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搬回了bbs.lemote.com的老域名。& w9 o& i0 L) a
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现在本站由龙梦双路3A3000+7A服务器以及龙梦Fedora28系统强力驱动!5 N) a$ a. e" ]: f6 ?
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- [root@3B3000 ~]# cat /proc/cpuinfo
0 G; |8 c- {* B" O' _, M- | - system type : generic-loongson-machine
2 K3 l0 X& Y& J, N6 c - machine : loongson,generic( Q9 E4 n% K) \8 P9 {, F
- processor : 0
/ `6 o2 f& ^' _9 u( H - cpu model : Loongson-3 V0.13 FPU V0.1( ?. Y; B, |" P! @* Q9 T
- model name : Loongson-3A R3 (Loongson-3B3000) @ 1450MHz% j/ O0 H$ G3 d: Z+ A$ h9 @7 k5 j
- CPU MHz : 1450.00% u9 Y# A: _% b& c% o
- BogoMIPS : 2887.52# m8 e/ k1 R& a. C7 E
- wait instruction : yes1 U7 M( n# q/ b0 j
- microsecond timers : yes
: R. j7 A% T. t- V0 c8 A - tlb_entries : 10884 O0 I! d# R4 _; M3 I ` q2 w
- extra interrupt vector : no
2 T8 T8 T2 J( X# F' O5 v - hardware watchpoint : yes, count: 0, address/irw mask: []
9 v+ `; D" f+ a: K' |5 a - isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
! M( {* Z( ]0 n0 o2 b; }6 K - ASEs implemented : dsp dsp2 loongson-mmi loongson-cam loongson-ext loongson-ext2
( X/ p6 ]3 S0 k' C' n3 z - shadow register sets : 1
7 Q% x4 \+ U: N: L6 Y$ ] - kscratch registers : 6
% ~+ ^1 b4 T# s4 g& G - package : 0( R1 k* W D! }2 p b5 n
- core : 0
; k1 n8 @1 O; ~, L1 I - VCED exceptions : not available- X, p! K @3 F- Q1 x7 D
- VCEI exceptions : not available
9 i ?. K4 v: E9 C! H - 4 M1 H+ b' O& r8 B& z( j
- processor : 1
% y. C* f! a7 n0 m2 a# F4 O. X* h - cpu model : Loongson-3 V0.13 FPU V0.1- R- u# l/ j. Y- f( _) N
- model name : Loongson-3A R3 (Loongson-3B3000) @ 1450MHz
) }% h- ?7 }, {0 Q) P. P* G - CPU MHz : 1450.00
, X9 a1 }2 m7 a D* m" n - BogoMIPS : 2902.61; S9 C; j1 x& d
- wait instruction : yes1 o* A) T% I& _6 U
- microsecond timers : yes
5 M4 t& u6 D \- B - tlb_entries : 10882 ?2 r5 c& U6 s
- extra interrupt vector : no" u0 }* j6 L' n# I6 t( ^% W: k
- hardware watchpoint : yes, count: 0, address/irw mask: []
/ B1 S. T3 X8 T7 K# B - isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r20 E% c* t2 t% w% W4 g' f% p2 s p
- ASEs implemented : dsp dsp2 loongson-mmi loongson-cam loongson-ext loongson-ext2# P& i( J. { O: k+ [- T
- shadow register sets : 1! W4 q& E! n- g
- kscratch registers : 6
& }. K% F3 t! E: u6 L$ g( t - package : 0
# A4 k- g9 r6 Y$ f1 A n/ ^6 T - core : 1
! b0 L2 c7 Y5 o - VCED exceptions : not available5 f# z& d: K% F T' H% j
- VCEI exceptions : not available
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5 E0 Q( d& `, }# |% s2 ]9 S6 Z- processor : 2
8 E+ e5 z# A) v2 K1 v - cpu model : Loongson-3 V0.13 FPU V0.1" P6 Z: _- P0 i, X) w" w
- model name : Loongson-3A R3 (Loongson-3B3000) @ 1450MHz' F/ N3 i& p9 N6 P+ B3 V
- CPU MHz : 1450.00) f9 X) u) U6 _6 n
- BogoMIPS : 2902.61
6 Q9 k1 m( j" W) ~6 C3 ~ - wait instruction : yes3 M: X1 s8 b" ?2 d3 @: G
- microsecond timers : yes3 M& H6 T* W7 t' ^6 o) F
- tlb_entries : 10883 }' Y5 R5 y1 z' N# {
- extra interrupt vector : no% y D) e- t9 v4 r
- hardware watchpoint : yes, count: 0, address/irw mask: []
3 ^; \, ^1 C" I- y( A& z - isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2+ I1 L3 G4 [) O; w. Q$ f) h& ^# s0 X& Y
- ASEs implemented : dsp dsp2 loongson-mmi loongson-cam loongson-ext loongson-ext2
; j/ W( y2 ^! D+ z/ \ - shadow register sets : 1/ y+ w/ m: N! \/ ]; t5 J
- kscratch registers : 67 x2 v) T8 K6 Z+ k7 m3 d% a8 ~
- package : 0$ [: w- ?. d8 Y+ k1 |4 U5 D( P
- core : 2
1 o$ M+ V$ E- }" e3 I - VCED exceptions : not available$ \) w3 D" G D
- VCEI exceptions : not available+ E+ {# V0 z& W
6 ]3 W* [3 j( T$ u6 d- processor : 34 x% z( x% }# k" ]4 Z0 c |" L
- cpu model : Loongson-3 V0.13 FPU V0.1* Y; _% w0 a3 R2 S% I4 o
- model name : Loongson-3A R3 (Loongson-3B3000) @ 1450MHz- I" R, z3 w0 x5 [
- CPU MHz : 1450.00
; w9 {- f, C% M; n - BogoMIPS : 2902.61
9 |4 ~& w% T8 X& M1 Q# q$ p - wait instruction : yes m! U7 O) N2 ?8 P( u
- microsecond timers : yes7 {5 G( O% |) k$ m4 [
- tlb_entries : 1088' g, L6 z0 H: ?/ s; H8 b
- extra interrupt vector : no
9 Q7 w) n% w* M1 G4 M a - hardware watchpoint : yes, count: 0, address/irw mask: []6 F& p O/ [/ d+ M
- isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r25 P9 s2 M2 }5 `( I- e4 a
- ASEs implemented : dsp dsp2 loongson-mmi loongson-cam loongson-ext loongson-ext2
- `3 L+ C0 U3 {0 N0 E - shadow register sets : 1, K/ N/ V0 t6 H* s- b e$ s" T* i
- kscratch registers : 6. ^& h; ]3 O$ ?8 p/ |2 B, d
- package : 07 ^ A& c" g* ~1 l9 i$ Q. C
- core : 3
. \( |& e5 U+ Y$ v - VCED exceptions : not available" Q2 X, n. n5 U/ u1 Q
- VCEI exceptions : not available" C; ^# z! L+ y
- # R# ]2 p- O; l! o, C
- processor : 4
# D! S# v. b) o) ?5 A" z - cpu model : Loongson-3 V0.13 FPU V0.1& O% k3 B( y2 h* K
- model name : Loongson-3A R3 (Loongson-3B3000) @ 1450MHz
/ D6 x; V" x6 u" {* q8 u - CPU MHz : 1450.00
; m8 X! s2 N9 {/ d* x1 t$ t2 } - BogoMIPS : 2887.52" \5 A* k- j7 O
- wait instruction : yes6 m; D j" X" d' P4 D) g3 `
- microsecond timers : yes
6 h& E w3 Z2 u& @7 V+ w - tlb_entries : 1088* p6 Y6 G E4 G. q: X
- extra interrupt vector : no
" d m6 y. E0 {7 y - hardware watchpoint : yes, count: 0, address/irw mask: []
: w( D* k3 T8 j - isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
, S9 `3 L& [2 \1 h - ASEs implemented : dsp dsp2 loongson-mmi loongson-cam loongson-ext loongson-ext2 o8 C. I: c6 W2 x# A: Q& |. n3 M
- shadow register sets : 1& f- e/ }4 [ ~5 D- \+ @
- kscratch registers : 6
4 \4 ^( D7 m( }9 U; J/ C - package : 14 k* T5 B; f1 D8 N/ L; T
- core : 00 i' C, [1 z$ O/ O8 Y, E
- VCED exceptions : not available: G* m( E: o7 |6 }
- VCEI exceptions : not available
$ ]1 @2 @7 z- z6 |* t: r - " a( V J) O3 J7 \8 x2 n
- processor : 5) r- \1 W" C: s/ p
- cpu model : Loongson-3 V0.13 FPU V0.1
! M8 r% ^! U& ] m& D8 y1 r- B - model name : Loongson-3A R3 (Loongson-3B3000) @ 1450MHz* m8 g! q+ L; ~1 ?( i1 t% l9 Z1 f
- CPU MHz : 1450.00
8 H; F( M7 J! Q% z( t - BogoMIPS : 2887.52
0 w1 G+ C& ~9 E8 Y - wait instruction : yes
# r3 b# ~. B# T* S( r - microsecond timers : yes
5 u S3 n4 t9 t - tlb_entries : 1088$ P- V9 m/ s6 _; d5 k
- extra interrupt vector : no. Q. C) a( V+ @) O( v8 H
- hardware watchpoint : yes, count: 0, address/irw mask: []
5 l2 I- M/ y, Q9 v - isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r23 `) J+ T+ |: \# B. B H# B
- ASEs implemented : dsp dsp2 loongson-mmi loongson-cam loongson-ext loongson-ext2
. j! z. {/ S! l3 H - shadow register sets : 1
, x2 B+ c8 U2 a+ C - kscratch registers : 6' y% x+ ?4 r. \ o
- package : 16 U* ?/ m1 ~1 c9 z" R. |0 M( s- @
- core : 1/ v6 \% P- X, ]) x z
- VCED exceptions : not available
: k: s: M- T" g - VCEI exceptions : not available
! m, ~! W: M* l- J& Q9 m X5 Y
1 q N% P% G' Q* p5 a/ E- processor : 6' W6 J- f$ H( m: z" Q/ W
- cpu model : Loongson-3 V0.13 FPU V0.1. W2 B% S* @, d7 B2 Q, e
- model name : Loongson-3A R3 (Loongson-3B3000) @ 1450MHz+ H _: f6 a ]7 ]1 x* }
- CPU MHz : 1450.00
6 L3 m% \. N2 d' j5 k - BogoMIPS : 2887.52
7 y9 z; M) k% Z* o. n - wait instruction : yes' i# w0 v8 y' a
- microsecond timers : yes
% h* K# R$ s9 }! d - tlb_entries : 1088* E- w: r( Q+ u3 W: r5 V* V
- extra interrupt vector : no* r! S/ v- r7 v
- hardware watchpoint : yes, count: 0, address/irw mask: []
6 f% n6 Y4 q0 ^- @! m' |! F - isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
9 g- J; A+ u' O1 x6 ]8 W - ASEs implemented : dsp dsp2 loongson-mmi loongson-cam loongson-ext loongson-ext2% k! G& h' J3 X D! r
- shadow register sets : 1
# _/ _; H* a+ @. C; Y: \ j s& I - kscratch registers : 64 B) O3 M2 |: Y( r1 O
- package : 1
& n. c2 k# a0 p; P8 y# I# p- K- b9 C3 Q - core : 27 ]' r9 a( R6 M* A0 h
- VCED exceptions : not available
8 _( D, ^# m. V( O! n6 O - VCEI exceptions : not available; O" q3 U$ f# ~/ A1 }9 E2 v: ?
- ; k* m. {( F" C! I4 A
- processor : 7
3 I" Q+ h; h* I: J - cpu model : Loongson-3 V0.13 FPU V0.1/ o6 b7 j% w; G6 P9 m
- model name : Loongson-3A R3 (Loongson-3B3000) @ 1450MHz+ \4 z7 ~5 \0 H" ^+ O2 V- O; z" }
- CPU MHz : 1450.00
) Y- L, l- a- `' R$ \5 ?* P - BogoMIPS : 2887.52 G. ?$ |0 ^ G. f! e6 z4 ?
- wait instruction : yes0 G* `. f# @' W7 E' k
- microsecond timers : yes# T/ b# y) v& @& z3 i
- tlb_entries : 1088* X; q$ Q9 t1 W" \8 ~( P
- extra interrupt vector : no; E+ @' v9 M% ?
- hardware watchpoint : yes, count: 0, address/irw mask: []& @9 n. e6 [$ c- S" V; Y
- isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2
3 P9 `! `% t- q - ASEs implemented : dsp dsp2 loongson-mmi loongson-cam loongson-ext loongson-ext2) k( u0 l/ S: f% R1 E$ j0 F
- shadow register sets : 1
: h9 i" V* u: u0 w0 R1 } - kscratch registers : 66 Z9 ?$ B4 P, z; ~2 \
- package : 1
* T5 R. J9 |( t5 ` - core : 3
' {% J) p' m; N$ S' Y - VCED exceptions : not available9 J0 \* ~6 Q' m6 j/ ^) E- ~ h
- VCEI exceptions : not available
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